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Weather_ESP/components/spidriver/spi_master_lobo.c

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD

  2. //

  3. // Licensed under the Apache License, Version 2.0 (the "License");

  4. // you may not use this file except in compliance with the License.

  5. // You may obtain a copy of the License at

  6. 

  7. //     http://www.apache.org/licenses/LICENSE-2.0

  8. //

  9. // Unless required by applicable law or agreed to in writing, software

  10. // distributed under the License is distributed on an "AS IS" BASIS,

  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

  12. // See the License for the specific language governing permissions and

  13. // limitations under the License.

  14. 

  15. 

  16. /*

  17. ----------------------------------------

  18. Non DMA version of the spi_master driver

  19. ----------------------------------------

  20. ------------------------------------------------------------------------------------

  21. Based on esp-idf 'spi_master', modified by LoBo (https://github.com/loboris) 03/2017

  22. ------------------------------------------------------------------------------------

  23. 

  24. * Transfers data to SPI device in direct mode, not using DMA

  25. * All configuration options (bus, device, transaction) are the same as in spi_master driver

  26. * Transfers uses the semaphore (taken in select function & given in deselect function) to protect the transfer

  27. * Number of the devices attached to the bus which uses hardware CS can be 3 ('NO_CS')

  28. * Additional devices which uses software CS can be attached to the bus, up to 'NO_DEV'

  29. * 'spi_bus_initialize' & 'spi_bus_remove' functions are removed, spi bus is initiated/removed in spi_lobo_bus_add_device/spi_lobo_bus_remove_device when needed

  30. * 'spi_lobo_bus_add_device' function has added parameter 'bus_config' and automatically initializes spi bus device if not already initialized

  31. * 'spi_lobo_bus_remove_device' automatically removes spi bus device if no other devices are attached to it.

  32. * Devices can have individual bus_configs, so different mosi, miso, sck pins can be configured for each device

  33.     Reconfiguring the bus is done automaticaly in 'spi_lobo_device_select' function

  34. * 'spi_lobo_device_select' & 'spi_lobo_device_deselect' functions handles devices configuration changes and software CS

  35. * Some helper functions are added ('spi_lobo_get_speed', 'spi_lobo_set_speed', ...)

  36. * All structures are available in header file for easy creation of user low level spi functions. See **tftfunc.c** source for examples.

  37. * Transimt and receive lenghts are limited only by available memory

  38. 

  39. 

  40. Main driver's function is 'spi_lobo_transfer_data()'

  41. 

  42.  * TRANSMIT 8-bit data to spi device from 'trans->tx_buffer' or 'trans->tx_data' (trans->lenght/8 bytes)

  43.  * and RECEIVE data to 'trans->rx_buffer' or 'trans->rx_data' (trans->rx_length/8 bytes)

  44.  * Lengths must be 8-bit multiples!

  45.  * If trans->rx_buffer is NULL or trans->rx_length is 0, only transmits data

  46.  * If trans->tx_buffer is NULL or trans->length is 0, only receives data

  47.  * If the device is in duplex mode (LB_SPI_DEVICE_HALFDUPLEX flag NOT set), data are transmitted and received simultaneously.

  48.  * If the device is in half duplex mode (LB_SPI_DEVICE_HALFDUPLEX flag IS set), data are received after transmission

  49.  * 'address', 'command' and 'dummy bits' are transmitted before data phase IF set in device's configuration

  50.  *   and IF 'trans->length' and 'trans->rx_length' are NOT both 0

  51.  * If configured, devices 'pre_cb' callback is called before and 'post_cb' after the transmission

  52.  * If device was not previously selected, it will be selected before transmission and deselected after transmission.

  53. 

  54. */

  55. 

  56. /*

  57.  Replace this include with

  58.  #include "driver/spi_master_lobo.h"

  59.  if the driver is located in esp-isf/components

  60. */

  61. #include "freertos/FreeRTOS.h"

  62. #include <string.h>

  63. #include "soc/spi_reg.h"

  64. #include "soc/dport_reg.h"

  65. #include "esp_log.h"

  66. #include "freertos/semphr.h"

  67. #include "driver/uart.h"

  68. #include "driver/gpio.h"

  69. #include "spi_master_lobo.h"

  70. #include "driver/periph_ctrl.h"

  71. 

  72. static spi_lobo_host_t *spihost[3] = {NULL};

  73. 

  74. 

  75. static const char *SPI_TAG = "spi_lobo_master";

  76. #define SPI_CHECK(a, str, ret_val) \

  77.     if (!(a)) { \

  78.         ESP_LOGE(SPI_TAG,"%s(%d): %s", __FUNCTION__, __LINE__, str); \

  79.         return (ret_val); \

  80.     }

  81. 

  82. /*

  83.  Stores a bunch of per-spi-peripheral data.

  84. */

  85. typedef struct {

  86.     const uint8_t spiclk_out;       //GPIO mux output signals

  87.     const uint8_t spid_out;

  88.     const uint8_t spiq_out;

  89.     const uint8_t spiwp_out;

  90.     const uint8_t spihd_out;

  91.     const uint8_t spid_in;          //GPIO mux input signals

  92.     const uint8_t spiq_in;

  93.     const uint8_t spiwp_in;

  94.     const uint8_t spihd_in;

  95.     const uint8_t spics_out[3];     // /CS GPIO output mux signals

  96.     const uint8_t spiclk_native;    //IO pins of IO_MUX muxed signals

  97.     const uint8_t spid_native;

  98.     const uint8_t spiq_native;

  99.     const uint8_t spiwp_native;

  100.     const uint8_t spihd_native;

  101.     const uint8_t spics0_native;

  102.     const uint8_t irq;              //irq source for interrupt mux

  103.     const uint8_t irq_dma;          //dma irq source for interrupt mux

  104.     const periph_module_t module;   //peripheral module, for enabling clock etc

  105.     spi_dev_t *hw;                  //Pointer to the hardware registers

  106. } spi_signal_conn_t;

  107. 

  108. /*

  109.  Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc

  110. */

  111. static const spi_signal_conn_t io_signal[3]={

  112.     {

  113.         .spiclk_out=SPICLK_OUT_IDX,

  114.         .spid_out=SPID_OUT_IDX,

  115.         .spiq_out=SPIQ_OUT_IDX,

  116.         .spiwp_out=SPIWP_OUT_IDX,

  117.         .spihd_out=SPIHD_OUT_IDX,

  118.         .spid_in=SPID_IN_IDX,

  119.         .spiq_in=SPIQ_IN_IDX,

  120.         .spiwp_in=SPIWP_IN_IDX,

  121.         .spihd_in=SPIHD_IN_IDX,

  122.         .spics_out={SPICS0_OUT_IDX, SPICS1_OUT_IDX, SPICS2_OUT_IDX},

  123.         .spiclk_native=6,

  124.         .spid_native=8,

  125.         .spiq_native=7,

  126.         .spiwp_native=10,

  127.         .spihd_native=9,

  128.         .spics0_native=11,

  129.         .irq=ETS_SPI1_INTR_SOURCE,

  130.         .irq_dma=ETS_SPI1_DMA_INTR_SOURCE,

  131.         .module=PERIPH_SPI_MODULE,

  132.         .hw=&SPI1

  133.     }, {

  134.         .spiclk_out=HSPICLK_OUT_IDX,

  135.         .spid_out=HSPID_OUT_IDX,

  136.         .spiq_out=HSPIQ_OUT_IDX,

  137.         .spiwp_out=HSPIWP_OUT_IDX,

  138.         .spihd_out=HSPIHD_OUT_IDX,

  139.         .spid_in=HSPID_IN_IDX,

  140.         .spiq_in=HSPIQ_IN_IDX,

  141.         .spiwp_in=HSPIWP_IN_IDX,

  142.         .spihd_in=HSPIHD_IN_IDX,

  143.         .spics_out={HSPICS0_OUT_IDX, HSPICS1_OUT_IDX, HSPICS2_OUT_IDX},

  144.         .spiclk_native=14,

  145.         .spid_native=13,

  146.         .spiq_native=12,

  147.         .spiwp_native=2,

  148.         .spihd_native=4,

  149.         .spics0_native=15,

  150.         .irq=ETS_SPI2_INTR_SOURCE,

  151.         .irq_dma=ETS_SPI2_DMA_INTR_SOURCE,

  152.         .module=PERIPH_HSPI_MODULE,

  153.         .hw=&SPI2

  154.     }, {

  155.         .spiclk_out=VSPICLK_OUT_IDX,

  156.         .spid_out=VSPID_OUT_IDX,

  157.         .spiq_out=VSPIQ_OUT_IDX,

  158.         .spiwp_out=VSPIWP_OUT_IDX,

  159.         .spihd_out=VSPIHD_OUT_IDX,

  160.         .spid_in=VSPID_IN_IDX,

  161.         .spiq_in=VSPIQ_IN_IDX,

  162.         .spiwp_in=VSPIWP_IN_IDX,

  163.         .spihd_in=VSPIHD_IN_IDX,

  164.         .spics_out={VSPICS0_OUT_IDX, VSPICS1_OUT_IDX, VSPICS2_OUT_IDX},

  165.         .spiclk_native=18,

  166.         .spid_native=23,

  167.         .spiq_native=19,

  168.         .spiwp_native=22,

  169.         .spihd_native=21,

  170.         .spics0_native=5,

  171.         .irq=ETS_SPI3_INTR_SOURCE,

  172.         .irq_dma=ETS_SPI3_DMA_INTR_SOURCE,

  173.         .module=PERIPH_VSPI_MODULE,

  174.         .hw=&SPI3

  175.     }

  176. };

  177. 

  178. 

  179. //======================================================================================================

  180. 

  181. #define DMA_CHANNEL_ENABLED(dma_chan)    (BIT(dma_chan-1))

  182. 

  183. typedef void(*dmaworkaround_cb_t)(void *arg);

  184. 

  185. //Set up a list of dma descriptors. dmadesc is an array of descriptors. Data is the buffer to point to.

  186. //--------------------------------------------------------------------------------------------

  187. void spi_lobo_setup_dma_desc_links(lldesc_t *dmadesc, int len, const uint8_t *data, bool isrx)

  188. {

  189.     int n = 0;

  190.     while (len) {

  191.         int dmachunklen = len;

  192.         if (dmachunklen > SPI_MAX_DMA_LEN) dmachunklen = SPI_MAX_DMA_LEN;

  193.         if (isrx) {

  194.             //Receive needs DMA length rounded to next 32-bit boundary

  195.             dmadesc[n].size = (dmachunklen + 3) & (~3);

  196.             dmadesc[n].length = (dmachunklen + 3) & (~3);

  197.         } else {

  198.             dmadesc[n].size = dmachunklen;

  199.             dmadesc[n].length = dmachunklen;

  200.         }

  201.         dmadesc[n].buf = (uint8_t *)data;

  202.         dmadesc[n].eof = 0;

  203.         dmadesc[n].sosf = 0;

  204.         dmadesc[n].owner = 1;

  205.         dmadesc[n].qe.stqe_next = &dmadesc[n + 1];

  206.         len -= dmachunklen;

  207.         data += dmachunklen;

  208.         n++;

  209.     }

  210.     dmadesc[n - 1].eof = 1; //Mark last DMA desc as end of stream.

  211.     dmadesc[n - 1].qe.stqe_next = NULL;

  212. }

  213. 

  214. 

  215. /*

  216. Code for workaround for DMA issue in ESP32 v0/v1 silicon

  217. */

  218. 

  219. 

  220. static volatile int dmaworkaround_channels_busy[2] = {0, 0};

  221. static dmaworkaround_cb_t dmaworkaround_cb;

  222. static void *dmaworkaround_cb_arg;

  223. static portMUX_TYPE dmaworkaround_mux = portMUX_INITIALIZER_UNLOCKED;

  224. static int dmaworkaround_waiting_for_chan = 0;

  225. static bool spi_periph_claimed[3] = {true, false, false};

  226. static uint8_t spi_dma_chan_enabled = 0;

  227. static portMUX_TYPE spi_dma_spinlock = portMUX_INITIALIZER_UNLOCKED;

  228. 

  229. //--------------------------------------------------------------------------------------------

  230. bool IRAM_ATTR spi_lobo_dmaworkaround_req_reset(int dmachan, dmaworkaround_cb_t cb, void *arg)

  231. {

  232.     int otherchan = (dmachan == 1) ? 2 : 1;

  233.     bool ret;

  234.     portENTER_CRITICAL(&dmaworkaround_mux);

  235.     if (dmaworkaround_channels_busy[otherchan-1]) {

  236.         //Other channel is busy. Call back when it's done.

  237.         dmaworkaround_cb = cb;

  238.         dmaworkaround_cb_arg = arg;

  239.         dmaworkaround_waiting_for_chan = otherchan;

  240.         ret = false;

  241.     } else {

  242.         //Reset DMA

  243.         DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_DMA_RST);

  244.         DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_DMA_RST);

  245.         ret = true;

  246.     }

  247.     portEXIT_CRITICAL(&dmaworkaround_mux);

  248.     return ret;

  249. }

  250. 

  251. //-------------------------------------------------------

  252. bool IRAM_ATTR spi_lobo_dmaworkaround_reset_in_progress()

  253. {

  254.     return (dmaworkaround_waiting_for_chan != 0);

  255. }

  256. 

  257. //-----------------------------------------------------

  258. void IRAM_ATTR spi_lobo_dmaworkaround_idle(int dmachan)

  259. {

  260.     portENTER_CRITICAL(&dmaworkaround_mux);

  261.     dmaworkaround_channels_busy[dmachan-1] = 0;

  262.     if (dmaworkaround_waiting_for_chan == dmachan) {

  263.         //Reset DMA

  264.         DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_DMA_RST);

  265.         DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_DMA_RST);

  266.         dmaworkaround_waiting_for_chan = 0;

  267.         //Call callback

  268.         dmaworkaround_cb(dmaworkaround_cb_arg);

  269. 

  270.     }

  271.     portEXIT_CRITICAL(&dmaworkaround_mux);

  272. }

  273. 

  274. //----------------------------------------------------------------

  275. void IRAM_ATTR spi_lobo_dmaworkaround_transfer_active(int dmachan)

  276. {

  277.     portENTER_CRITICAL(&dmaworkaround_mux);

  278.     dmaworkaround_channels_busy[dmachan-1] = 1;

  279.     portEXIT_CRITICAL(&dmaworkaround_mux);

  280. }

  281. 

  282. //Returns true if this peripheral is successfully claimed, false if otherwise.

  283. //-----------------------------------------------------

  284. bool spi_lobo_periph_claim(spi_lobo_host_device_t host)

  285. {

  286.     bool ret = __sync_bool_compare_and_swap(&spi_periph_claimed[host], false, true);

  287.     if (ret) periph_module_enable(io_signal[host].module);

  288.     return ret;

  289. }

  290. 

  291. //Returns true if this peripheral is successfully freed, false if otherwise.

  292. //-----------------------------------------------

  293. bool spi_lobo_periph_free(spi_lobo_host_device_t host)

  294. {

  295.     bool ret = __sync_bool_compare_and_swap(&spi_periph_claimed[host], true, false);

  296.     if (ret) periph_module_disable(io_signal[host].module);

  297.     return ret;

  298. }

  299. 

  300. //-----------------------------------------

  301. bool spi_lobo_dma_chan_claim (int dma_chan)

  302. {

  303.     bool ret = false;

  304.     assert( dma_chan == 1 || dma_chan == 2 );

  305. 

  306.     portENTER_CRITICAL(&spi_dma_spinlock);

  307.     if ( !(spi_dma_chan_enabled & DMA_CHANNEL_ENABLED(dma_chan)) ) {

  308.         // get the channel only when it's not claimed yet.

  309.         spi_dma_chan_enabled |= DMA_CHANNEL_ENABLED(dma_chan);

  310.         ret = true;

  311.     }

  312.     periph_module_enable( PERIPH_SPI_DMA_MODULE );

  313.     portEXIT_CRITICAL(&spi_dma_spinlock);

  314. 

  315.     return ret;

  316. }

  317. 

  318. //---------------------------------------

  319. bool spi_lobo_dma_chan_free(int dma_chan)

  320. {

  321.     assert( dma_chan == 1 || dma_chan == 2 );

  322.     assert( spi_dma_chan_enabled & DMA_CHANNEL_ENABLED(dma_chan) );

  323. 

  324.     portENTER_CRITICAL(&spi_dma_spinlock);

  325.     spi_dma_chan_enabled &= ~DMA_CHANNEL_ENABLED(dma_chan);

  326.     if ( spi_dma_chan_enabled == 0 ) {

  327.         //disable the DMA only when all the channels are freed.

  328.         periph_module_disable( PERIPH_SPI_DMA_MODULE );

  329.     }

  330.     portEXIT_CRITICAL(&spi_dma_spinlock);

  331. 

  332.     return true;

  333. }

  334. 

  335. 

  336. //======================================================================================================

  337. 

  338. 

  339. //----------------------------------------------------------------------------------------------------------------

  340. static esp_err_t spi_lobo_bus_initialize(spi_lobo_host_device_t host, spi_lobo_bus_config_t *bus_config, int init)

  341. {

  342.     bool native=true, spi_chan_claimed, dma_chan_claimed;

  343. 

  344.     if (init > 0) {

  345.         /* ToDo: remove this when we have flash operations cooperating with this */

  346.         SPI_CHECK(host!=TFT_SPI_HOST, "SPI1 is not supported", ESP_ERR_NOT_SUPPORTED);

  347. 

  348.         SPI_CHECK(host>=TFT_SPI_HOST && host<=TFT_VSPI_HOST, "invalid host", ESP_ERR_INVALID_ARG);

  349.         SPI_CHECK(spihost[host]==NULL, "host already in use", ESP_ERR_INVALID_STATE);

  350.     }

  351.     else {

  352.         SPI_CHECK(spihost[host]!=NULL, "host not in use", ESP_ERR_INVALID_STATE);

  353.     }

  354.     

  355.     SPI_CHECK(bus_config->mosi_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->mosi_io_num), "spid pin invalid", ESP_ERR_INVALID_ARG);

  356.     SPI_CHECK(bus_config->sclk_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->sclk_io_num), "spiclk pin invalid", ESP_ERR_INVALID_ARG);

  357.     SPI_CHECK(bus_config->miso_io_num<0 || GPIO_IS_VALID_GPIO(bus_config->miso_io_num), "spiq pin invalid", ESP_ERR_INVALID_ARG);

  358.     SPI_CHECK(bus_config->quadwp_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->quadwp_io_num), "spiwp pin invalid", ESP_ERR_INVALID_ARG);

  359.     SPI_CHECK(bus_config->quadhd_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->quadhd_io_num), "spihd pin invalid", ESP_ERR_INVALID_ARG);

  360. 

  361.     if (init > 0) {

  362.         spi_chan_claimed=spi_lobo_periph_claim(host);

  363.         SPI_CHECK(spi_chan_claimed, "host already in use", ESP_ERR_INVALID_STATE);

  364. 

  365.         //spihost[host]=malloc(sizeof(spi_lobo_host_t));

  366. 		spihost[host]=heap_caps_malloc(sizeof(spi_lobo_host_t), MALLOC_CAP_DMA);

  367. 		if (spihost[host]==NULL) return ESP_ERR_NO_MEM;

  368. 		memset(spihost[host], 0, sizeof(spi_lobo_host_t));

  369. 		// Create semaphore

  370. 		spihost[host]->spi_lobo_bus_mutex = xSemaphoreCreateMutex();

  371. 		if (!spihost[host]->spi_lobo_bus_mutex) return ESP_ERR_NO_MEM;

  372.     }

  373. 

  374.     spihost[host]->cur_device = -1;

  375.     memcpy(&spihost[host]->cur_bus_config, bus_config, sizeof(spi_lobo_bus_config_t));

  376. 

  377.     //Check if the selected pins correspond to the native pins of the peripheral

  378.     if (bus_config->mosi_io_num >= 0 && bus_config->mosi_io_num!=io_signal[host].spid_native) native=false;

  379.     if (bus_config->miso_io_num >= 0 && bus_config->miso_io_num!=io_signal[host].spiq_native) native=false;

  380.     if (bus_config->sclk_io_num >= 0 && bus_config->sclk_io_num!=io_signal[host].spiclk_native) native=false;

  381.     if (bus_config->quadwp_io_num >= 0 && bus_config->quadwp_io_num!=io_signal[host].spiwp_native) native=false;

  382.     if (bus_config->quadhd_io_num >= 0 && bus_config->quadhd_io_num!=io_signal[host].spihd_native) native=false;

  383.     

  384.     spihost[host]->no_gpio_matrix=native;

  385.     if (native) {

  386.         //All SPI native pin selections resolve to 1, so we put that here instead of trying to figure

  387.         //out which FUNC_GPIOx_xSPIxx to grab; they all are defined to 1 anyway.

  388.         if (bus_config->mosi_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->mosi_io_num], 1);

  389.         if (bus_config->miso_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->miso_io_num], 1);

  390.         if (bus_config->quadwp_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num], 1);

  391.         if (bus_config->quadhd_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num], 1);

  392.         if (bus_config->sclk_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->sclk_io_num], 1);

  393.     } else {

  394.         //Use GPIO 

  395.         if (bus_config->mosi_io_num>0) {

  396.             PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->mosi_io_num], PIN_FUNC_GPIO);

  397.             gpio_set_direction(bus_config->mosi_io_num, GPIO_MODE_OUTPUT);

  398.             gpio_matrix_out(bus_config->mosi_io_num, io_signal[host].spid_out, false, false);

  399.             gpio_matrix_in(bus_config->mosi_io_num, io_signal[host].spid_in, false);

  400.         }

  401.         if (bus_config->miso_io_num>0) {

  402.             PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->miso_io_num], PIN_FUNC_GPIO);

  403.             gpio_set_direction(bus_config->miso_io_num, GPIO_MODE_INPUT);

  404.             gpio_matrix_out(bus_config->miso_io_num, io_signal[host].spiq_out, false, false);

  405.             gpio_matrix_in(bus_config->miso_io_num, io_signal[host].spiq_in, false);

  406.         }

  407.         if (bus_config->quadwp_io_num>0) {

  408.             PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num], PIN_FUNC_GPIO);

  409.             gpio_set_direction(bus_config->quadwp_io_num, GPIO_MODE_OUTPUT);

  410.             gpio_matrix_out(bus_config->quadwp_io_num, io_signal[host].spiwp_out, false, false);

  411.             gpio_matrix_in(bus_config->quadwp_io_num, io_signal[host].spiwp_in, false);

  412.         }

  413.         if (bus_config->quadhd_io_num>0) {

  414.             PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num], PIN_FUNC_GPIO);

  415.             gpio_set_direction(bus_config->quadhd_io_num, GPIO_MODE_OUTPUT);

  416.             gpio_matrix_out(bus_config->quadhd_io_num, io_signal[host].spihd_out, false, false);

  417.             gpio_matrix_in(bus_config->quadhd_io_num, io_signal[host].spihd_in, false);

  418.         }

  419.         if (bus_config->sclk_io_num>0) {

  420.             PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->sclk_io_num], PIN_FUNC_GPIO);

  421.             gpio_set_direction(bus_config->sclk_io_num, GPIO_MODE_OUTPUT);

  422.             gpio_matrix_out(bus_config->sclk_io_num, io_signal[host].spiclk_out, false, false);

  423.         }

  424.     }

  425. 	periph_module_enable(io_signal[host].module);

  426. 	spihost[host]->hw=io_signal[host].hw;

  427. 

  428. 	if (init > 0) {

  429.         dma_chan_claimed=spi_lobo_dma_chan_claim(init);

  430.         if ( !dma_chan_claimed ) {

  431.         	spi_lobo_periph_free( host );

  432.             SPI_CHECK(dma_chan_claimed, "dma channel already in use", ESP_ERR_INVALID_STATE);

  433.         }

  434. 	    spihost[host]->dma_chan = init;

  435.         //See how many dma descriptors we need and allocate them

  436.         int dma_desc_ct=(bus_config->max_transfer_sz+SPI_MAX_DMA_LEN-1)/SPI_MAX_DMA_LEN;

  437.         if (dma_desc_ct==0) dma_desc_ct=1; //default to 4k when max is not given

  438.         spihost[host]->max_transfer_sz = dma_desc_ct*SPI_MAX_DMA_LEN;

  439. 

  440.         spihost[host]->dmadesc_tx=heap_caps_malloc(sizeof(lldesc_t)*dma_desc_ct, MALLOC_CAP_DMA);

  441.         spihost[host]->dmadesc_rx=heap_caps_malloc(sizeof(lldesc_t)*dma_desc_ct, MALLOC_CAP_DMA);

  442.         if (!spihost[host]->dmadesc_tx || !spihost[host]->dmadesc_rx) goto nomem;

  443. 

  444.         //Tell common code DMA workaround that our DMA channel is idle. If needed, the code will do a DMA reset.

  445.         spi_lobo_dmaworkaround_idle(spihost[host]->dma_chan);

  446. 

  447.         // Reset DMA

  448.         spihost[host]->hw->dma_conf.val |= SPI_OUT_RST|SPI_IN_RST|SPI_AHBM_RST|SPI_AHBM_FIFO_RST;

  449.         spihost[host]->hw->dma_out_link.start=0;

  450.         spihost[host]->hw->dma_in_link.start=0;

  451.         spihost[host]->hw->dma_conf.val &= ~(SPI_OUT_RST|SPI_IN_RST|SPI_AHBM_RST|SPI_AHBM_FIFO_RST);

  452.         spihost[host]->hw->dma_conf.out_data_burst_en=1;

  453. 

  454.         //Reset timing

  455.         spihost[host]->hw->ctrl2.val=0;

  456. 

  457.         //Disable unneeded ints

  458.         spihost[host]->hw->slave.rd_buf_done=0;

  459.         spihost[host]->hw->slave.wr_buf_done=0;

  460.         spihost[host]->hw->slave.rd_sta_done=0;

  461.         spihost[host]->hw->slave.wr_sta_done=0;

  462.         spihost[host]->hw->slave.rd_buf_inten=0;

  463.         spihost[host]->hw->slave.wr_buf_inten=0;

  464.         spihost[host]->hw->slave.rd_sta_inten=0;

  465.         spihost[host]->hw->slave.wr_sta_inten=0;

  466. 

  467.         //Force a transaction done interrupt. This interrupt won't fire yet because we initialized the SPI interrupt as

  468.         //disabled.  This way, we can just enable the SPI interrupt and the interrupt handler will kick in, handling

  469.         //any transactions that are queued.

  470.         spihost[host]->hw->slave.trans_inten=1;

  471.         spihost[host]->hw->slave.trans_done=1;

  472. 

  473. 		//Select DMA channel.

  474. 		DPORT_SET_PERI_REG_BITS(DPORT_SPI_DMA_CHAN_SEL_REG, 3, init, (host * 2));

  475.     }

  476.     return ESP_OK;

  477. 

  478. nomem:

  479. 	if (spihost[host]) {

  480. 		free(spihost[host]->dmadesc_tx);

  481. 		free(spihost[host]->dmadesc_rx);

  482. 	}

  483. 	free(spihost[host]);

  484.     spi_lobo_periph_free(host);

  485. 	return ESP_ERR_NO_MEM;

  486. }

  487. 

  488. //---------------------------------------------------------------------------

  489. static esp_err_t spi_lobo_bus_free(spi_lobo_host_device_t host, int dofree)

  490. {

  491. 	if ((host == TFT_SPI_HOST) || (host > TFT_VSPI_HOST)) return ESP_ERR_NOT_SUPPORTED;  // invalid host

  492. 

  493. 	if (spihost[host] == NULL) return ESP_ERR_INVALID_STATE;  // host not in use

  494. 

  495.     if (dofree) {

  496. 		for (int x=0; x<NO_DEV; x++) {

  497. 			if (spihost[host]->device[x] != NULL) return ESP_ERR_INVALID_STATE;  // not all devices freed

  498. 		}

  499.     }

  500.     if ( spihost[host]->dma_chan > 0 ) {

  501.         spi_lobo_dma_chan_free ( spihost[host]->dma_chan );

  502.     }

  503.     spihost[host]->hw->slave.trans_inten=0;

  504.     spihost[host]->hw->slave.trans_done=0;

  505.     spi_lobo_periph_free(host);

  506. 

  507.     if (dofree) {

  508. 		vSemaphoreDelete(spihost[host]->spi_lobo_bus_mutex);

  509. 	    free(spihost[host]->dmadesc_tx);

  510. 	    free(spihost[host]->dmadesc_rx);

  511. 		free(spihost[host]);

  512. 		spihost[host] = NULL;

  513.     }

  514.     return ESP_OK;

  515. }

  516. 

  517. //---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

  518. esp_err_t spi_lobo_bus_add_device(spi_lobo_host_device_t host, spi_lobo_bus_config_t *bus_config, spi_lobo_device_interface_config_t *dev_config, spi_lobo_device_handle_t *handle)

  519. {

  520. 	if ((host == TFT_SPI_HOST) || (host > TFT_VSPI_HOST)) return ESP_ERR_NOT_SUPPORTED;  // invalid host

  521. 	

  522. 	if (spihost[host] == NULL) {

  523. 		esp_err_t ret = spi_lobo_bus_initialize(host, bus_config, 1);

  524. 		if (ret) return ret;

  525. 	}

  526. 	

  527. 	int freecs, maxdev;

  528.     int apbclk=APB_CLK_FREQ;

  529. 

  530. 	if (spihost[host] == NULL) return ESP_ERR_INVALID_STATE;

  531. 

  532.     if (dev_config->spics_io_num >= 0) {

  533. 		if (!GPIO_IS_VALID_OUTPUT_GPIO(dev_config->spics_io_num)) return  ESP_ERR_INVALID_ARG;

  534. 		if (dev_config->spics_ext_io_num > 0) dev_config->spics_ext_io_num = -1;

  535. 	}

  536. 	else {

  537. 		//if ((dev_config->spics_ext_io_num <= 0) || (!GPIO_IS_VALID_OUTPUT_GPIO(dev_config->spics_ext_io_num))) return ESP_ERR_INVALID_ARG;

  538. 	}

  539. 

  540.     //ToDo: Check if some other device uses the same 'spics_ext_io_num'

  541. 

  542.     if (dev_config->clock_speed_hz == 0) return ESP_ERR_INVALID_ARG;

  543. 	if (dev_config->spics_io_num > 0) maxdev = NO_CS;

  544. 	else maxdev = NO_DEV;

  545. 

  546.     for (freecs=0; freecs<maxdev; freecs++) {

  547.         //See if this slot is free; reserve if it is by putting a dummy pointer in the slot. We use an atomic compare&swap to make this thread-safe.

  548.         if (__sync_bool_compare_and_swap(&spihost[host]->device[freecs], NULL, (spi_lobo_device_t *)1)) break;

  549.     }

  550.     if (freecs == maxdev) return ESP_ERR_NOT_FOUND;

  551. 

  552.     // The hardware looks like it would support this, but actually setting cs_ena_pretrans when transferring in full

  553.     // duplex mode does absolutely nothing on the ESP32.

  554.     if ((dev_config->cs_ena_pretrans != 0) && (dev_config->flags & LB_SPI_DEVICE_HALFDUPLEX)) return ESP_ERR_INVALID_ARG;

  555. 

  556.     // Speeds >=40MHz over GPIO matrix needs a dummy cycle, but these don't work for full-duplex connections.

  557.     if (((dev_config->flags & LB_SPI_DEVICE_HALFDUPLEX)==0) && (dev_config->clock_speed_hz > ((apbclk*2)/5)) && (!spihost[host]->no_gpio_matrix)) return ESP_ERR_INVALID_ARG;

  558. 

  559.     //Allocate memory for device

  560.     spi_lobo_device_t *dev=malloc(sizeof(spi_lobo_device_t));

  561.     if (dev==NULL) return ESP_ERR_NO_MEM;

  562. 

  563.     memset(dev, 0, sizeof(spi_lobo_device_t));

  564.     spihost[host]->device[freecs]=dev;

  565. 

  566.     if (dev_config->duty_cycle_pos==0) dev_config->duty_cycle_pos=128;

  567.     dev->host=spihost[host];

  568. 	dev->host_dev = host;

  569. 

  570.     //We want to save a copy of the dev config in the dev struct.

  571.     memcpy(&dev->cfg, dev_config, sizeof(spi_lobo_device_interface_config_t));

  572.     //We want to save a copy of the bus config in the dev struct.

  573.     memcpy(&dev->bus_config, bus_config, sizeof(spi_lobo_bus_config_t));

  574. 

  575.     //Set CS pin, CS options

  576.     if (dev_config->spics_io_num > 0) {

  577.         if (spihost[host]->no_gpio_matrix &&dev_config->spics_io_num == io_signal[host].spics0_native && freecs==0) {

  578.             //Again, the cs0s for all SPI peripherals map to pin mux source 1, so we use that instead of a define.

  579.             PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[dev_config->spics_io_num], 1);

  580.         } else {

  581.             //Use GPIO matrix

  582.             PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[dev_config->spics_io_num], PIN_FUNC_GPIO);

  583.             gpio_set_direction(dev_config->spics_io_num, GPIO_MODE_OUTPUT);

  584.             gpio_matrix_out(dev_config->spics_io_num, io_signal[host].spics_out[freecs], false, false);

  585.         }

  586.     }

  587.     else if (dev_config->spics_ext_io_num >= 0) {

  588. 		gpio_set_direction(dev_config->spics_ext_io_num, GPIO_MODE_OUTPUT);

  589. 		gpio_set_level(dev_config->spics_ext_io_num, 1);

  590. 	}

  591.     if (dev_config->flags & LB_SPI_DEVICE_CLK_AS_CS) {

  592.         spihost[host]->hw->pin.master_ck_sel |= (1<<freecs);

  593.     } else {

  594.         spihost[host]->hw->pin.master_ck_sel &= (1<<freecs);

  595.     }

  596.     if (dev_config->flags & LB_SPI_DEVICE_POSITIVE_CS) {

  597.         spihost[host]->hw->pin.master_cs_pol |= (1<<freecs);

  598.     } else {

  599.         spihost[host]->hw->pin.master_cs_pol &= (1<<freecs);

  600.     }

  601. 

  602.     *handle = dev;

  603.     return ESP_OK;

  604. }

  605. 

  606. //-------------------------------------------------------------------

  607. esp_err_t spi_lobo_bus_remove_device(spi_lobo_device_handle_t handle)

  608. {

  609.     int x;

  610.     if (handle == NULL) return ESP_ERR_INVALID_ARG;

  611. 

  612.     //Remove device from list of csses and free memory

  613.     for (x=0; x<NO_DEV; x++) {

  614.         if (handle->host->device[x] == handle) handle->host->device[x]=NULL;

  615.     }

  616. 	

  617. 	// Check if all devices are removed from this host and free the bus if yes

  618. 	for (x=0; x<NO_DEV; x++) {

  619. 		if (spihost[handle->host_dev]->device[x] !=NULL) break;

  620. 	}

  621. 	if (x == NO_DEV) {

  622. 		free(handle);

  623. 		spi_lobo_bus_free(handle->host_dev, 1);

  624. 	}

  625. 	else free(handle);

  626. 

  627. 	return ESP_OK;

  628. }

  629. 

  630. //-----------------------------------------------------------------

  631. static int IRAM_ATTR spi_freq_for_pre_n(int fapb, int pre, int n) {

  632.     return (fapb / (pre * n));

  633. }

  634. 

  635. /*

  636.  * Set the SPI clock to a certain frequency. Returns the effective frequency set, which may be slightly

  637.  * different from the requested frequency.

  638.  */

  639. //-----------------------------------------------------------------------------------

  640. static int IRAM_ATTR spi_set_clock(spi_dev_t *hw, int fapb, int hz, int duty_cycle) {

  641.    int pre, n, h, l, eff_clk;

  642. 

  643.     //In hw, n, h and l are 1-64, pre is 1-8K. Value written to register is one lower than used value.

  644.     if (hz>((fapb/4)*3)) {

  645.         //Using Fapb directly will give us the best result here.

  646.         hw->clock.clkcnt_l=0;

  647.         hw->clock.clkcnt_h=0;

  648.         hw->clock.clkcnt_n=0;

  649.         hw->clock.clkdiv_pre=0;

  650.         hw->clock.clk_equ_sysclk=1;

  651.         eff_clk=fapb;

  652.     } else {

  653.         //For best duty cycle resolution, we want n to be as close to 32 as possible, but

  654.         //we also need a pre/n combo that gets us as close as possible to the intended freq.

  655.         //To do this, we bruteforce n and calculate the best pre to go along with that.

  656.         //If there's a choice between pre/n combos that give the same result, use the one

  657.         //with the higher n.

  658.         int bestn=-1;

  659.         int bestpre=-1;

  660.         int besterr=0;

  661.         int errval;

  662.         for (n=1; n<=64; n++) {

  663.             //Effectively, this does pre=round((fapb/n)/hz).

  664.             pre=((fapb/n)+(hz/2))/hz;

  665.             if (pre<=0) pre=1;

  666.             if (pre>8192) pre=8192;

  667.             errval=abs(spi_freq_for_pre_n(fapb, pre, n)-hz);

  668.             if (bestn==-1 || errval<=besterr) {

  669.                 besterr=errval;

  670.                 bestn=n;

  671.                 bestpre=pre;

  672.             }

  673.         }

  674. 

  675.         n=bestn;

  676.         pre=bestpre;

  677.         l=n;

  678.         //This effectively does round((duty_cycle*n)/256)

  679.         h=(duty_cycle*n+127)/256;

  680.         if (h<=0) h=1;

  681. 

  682.         hw->clock.clk_equ_sysclk=0;

  683.         hw->clock.clkcnt_n=n-1;

  684.         hw->clock.clkdiv_pre=pre-1;

  685.         hw->clock.clkcnt_h=h-1;

  686.         hw->clock.clkcnt_l=l-1;

  687.         eff_clk=spi_freq_for_pre_n(fapb, pre, n);

  688.     }

  689.     return eff_clk;

  690. }

  691. 

  692. 

  693. 

  694. //------------------------------------------------------------------------------------

  695. esp_err_t IRAM_ATTR spi_lobo_device_select(spi_lobo_device_handle_t handle, int force)

  696. {

  697. 	if (handle == NULL) return ESP_ERR_INVALID_ARG;

  698. 

  699. 	if ((handle->cfg.selected == 1) && (!force)) return ESP_OK;  // already selected

  700. 

  701. 	int i;

  702. 	spi_lobo_host_t *host=(spi_lobo_host_t*)handle->host;

  703. 

  704. 	// find device's host bus

  705. 	for (i=0; i<NO_DEV; i++) {

  706. 		if (host->device[i] == handle) break;

  707. 	}

  708. 	if (i == NO_DEV) return ESP_ERR_INVALID_ARG;

  709. 

  710. 	if (!(xSemaphoreTake(host->spi_lobo_bus_mutex, SPI_SEMAPHORE_WAIT))) return ESP_ERR_INVALID_STATE;

  711. 

  712. 	// Check if previously used device's bus device is the same

  713. 	if (memcmp(&host->cur_bus_config, &handle->bus_config, sizeof(spi_lobo_bus_config_t)) != 0) {

  714. 		// device has different bus configuration, we need to reconfigure the bus

  715. 		esp_err_t err = spi_lobo_bus_free(1, 0);

  716. 		if (err) {

  717. 			xSemaphoreGive(host->spi_lobo_bus_mutex);

  718. 			return err;

  719. 		}

  720. 		err = spi_lobo_bus_initialize(i, &handle->bus_config, -1);

  721. 		if (err) {

  722. 			xSemaphoreGive(host->spi_lobo_bus_mutex);

  723. 			return err;

  724. 		}

  725. 	}

  726. 

  727. 	//Reconfigure according to device settings, but only if the device changed or forced.

  728. 	if ((force) || (host->device[host->cur_device] != handle)) {

  729. 	    //Assumes a hardcoded 80MHz Fapb for now. ToDo: figure out something better once we have clock scaling working.

  730. 		int apbclk=APB_CLK_FREQ;

  731. 

  732. 	    //Speeds >=40MHz over GPIO matrix needs a dummy cycle, but these don't work for full-duplex connections.

  733. 	    if (((handle->cfg.flags & LB_SPI_DEVICE_HALFDUPLEX) == 0) && (handle->cfg.clock_speed_hz > ((apbclk*2)/5)) && (!host->no_gpio_matrix)) {

  734. 	    	// set speed to 32 MHz

  735. 	    	handle->cfg.clock_speed_hz = (apbclk*2)/5;

  736. 	    }

  737. 

  738. 		int effclk=spi_set_clock(host->hw, apbclk, handle->cfg.clock_speed_hz, handle->cfg.duty_cycle_pos);

  739. 		//Configure bit order

  740. 		host->hw->ctrl.rd_bit_order=(handle->cfg.flags & LB_SPI_DEVICE_RXBIT_LSBFIRST)?1:0;

  741. 		host->hw->ctrl.wr_bit_order=(handle->cfg.flags & LB_SPI_DEVICE_TXBIT_LSBFIRST)?1:0;

  742. 		

  743. 		//Configure polarity

  744.         //SPI iface needs to be configured for a delay in some cases.

  745. 		int nodelay=0;

  746.         int extra_dummy=0;

  747.         if (host->no_gpio_matrix) {

  748.             if (effclk >= apbclk/2) {

  749.                 nodelay=1;

  750.             }

  751.         } else {

  752.             if (effclk >= apbclk/2) {

  753.                 nodelay=1;

  754.                 extra_dummy=1;          //Note: This only works on half-duplex connections. spi_lobo_bus_add_device checks for this.

  755.             } else if (effclk >= apbclk/4) {

  756.                 nodelay=1;

  757.             }

  758.         }

  759. 		if (handle->cfg.mode==0) {

  760. 			host->hw->pin.ck_idle_edge=0;

  761. 			host->hw->user.ck_out_edge=0;

  762. 			host->hw->ctrl2.miso_delay_mode=nodelay?0:2;

  763. 		} else if (handle->cfg.mode==1) {

  764. 			host->hw->pin.ck_idle_edge=0;

  765. 			host->hw->user.ck_out_edge=1;

  766. 			host->hw->ctrl2.miso_delay_mode=nodelay?0:1;

  767. 		} else if (handle->cfg.mode==2) {

  768. 			host->hw->pin.ck_idle_edge=1;

  769. 			host->hw->user.ck_out_edge=1;

  770. 			host->hw->ctrl2.miso_delay_mode=nodelay?0:1;

  771. 		} else if (handle->cfg.mode==3) {

  772. 			host->hw->pin.ck_idle_edge=1;

  773. 			host->hw->user.ck_out_edge=0;

  774. 			host->hw->ctrl2.miso_delay_mode=nodelay?0:2;

  775. 		}

  776. 

  777. 		//Configure bit sizes, load addr and command

  778. 		host->hw->user.usr_dummy=(handle->cfg.dummy_bits+extra_dummy)?1:0;

  779. 		host->hw->user.usr_addr=(handle->cfg.address_bits)?1:0;

  780. 		host->hw->user.usr_command=(handle->cfg.command_bits)?1:0;

  781. 		host->hw->user1.usr_addr_bitlen=handle->cfg.address_bits-1;

  782. 		host->hw->user1.usr_dummy_cyclelen=handle->cfg.dummy_bits+extra_dummy-1;

  783. 		host->hw->user2.usr_command_bitlen=handle->cfg.command_bits-1;

  784. 		//Configure misc stuff

  785. 		host->hw->user.doutdin=(handle->cfg.flags & LB_SPI_DEVICE_HALFDUPLEX)?0:1;

  786. 		host->hw->user.sio=(handle->cfg.flags & LB_SPI_DEVICE_3WIRE)?1:0;

  787. 

  788. 		host->hw->ctrl2.setup_time=handle->cfg.cs_ena_pretrans-1;

  789. 		host->hw->user.cs_setup=handle->cfg.cs_ena_pretrans?1:0;

  790. 		host->hw->ctrl2.hold_time=handle->cfg.cs_ena_posttrans-1;

  791. 		host->hw->user.cs_hold=(handle->cfg.cs_ena_posttrans)?1:0;

  792. 

  793. 		//Configure CS pin

  794. 		host->hw->pin.cs0_dis=(i==0)?0:1;

  795. 		host->hw->pin.cs1_dis=(i==1)?0:1;

  796. 		host->hw->pin.cs2_dis=(i==2)?0:1;

  797. 		

  798. 		host->cur_device = i;

  799. 	}

  800. 

  801. 	if ((handle->cfg.spics_io_num < 0) && (handle->cfg.spics_ext_io_num > 0)) {

  802. 		gpio_set_level(handle->cfg.spics_ext_io_num, 0);

  803. 	}

  804. 

  805. 	handle->cfg.selected = 1;

  806. 

  807. 	return ESP_OK;

  808. }

  809. 

  810. //---------------------------------------------------------------------------

  811. esp_err_t IRAM_ATTR spi_lobo_device_deselect(spi_lobo_device_handle_t handle)

  812. {

  813. 	if (handle == NULL) return ESP_ERR_INVALID_ARG;

  814. 

  815. 	if (handle->cfg.selected == 0) return ESP_OK;  // already deselected

  816. 

  817. 	int i;

  818. 	spi_lobo_host_t *host=(spi_lobo_host_t*)handle->host;

  819. 

  820. 	for (i=0; i<NO_DEV; i++) {

  821. 		if (host->device[i] == handle) break;

  822. 	}

  823. 	if (i == NO_DEV) return ESP_ERR_INVALID_ARG;

  824. 	

  825. 	if (host->device[host->cur_device] == handle) {

  826. 		if ((handle->cfg.spics_io_num < 0) && (handle->cfg.spics_ext_io_num > 0)) {

  827. 			gpio_set_level(handle->cfg.spics_ext_io_num, 1);

  828. 		}

  829. 	}

  830. 

  831. 	handle->cfg.selected = 0;

  832. 	xSemaphoreGive(host->spi_lobo_bus_mutex);

  833. 

  834. 	return ESP_OK;

  835. }

  836. 

  837. //--------------------------------------------------------------------------------

  838. esp_err_t IRAM_ATTR spi_lobo_device_TakeSemaphore(spi_lobo_device_handle_t handle)

  839. {

  840. 	if (!(xSemaphoreTake(handle->host->spi_lobo_bus_mutex, SPI_SEMAPHORE_WAIT))) return ESP_ERR_INVALID_STATE;

  841. 	else return ESP_OK;

  842. }

  843. 

  844. //---------------------------------------------------------------------------

  845. void IRAM_ATTR spi_lobo_device_GiveSemaphore(spi_lobo_device_handle_t handle)

  846. {

  847. 	xSemaphoreTake(handle->host->spi_lobo_bus_mutex, portMAX_DELAY);

  848. }

  849. 

  850. //----------------------------------------------------------

  851. uint32_t spi_lobo_get_speed(spi_lobo_device_handle_t handle)

  852. {

  853. 	spi_lobo_host_t *host=(spi_lobo_host_t*)handle->host;

  854. 	uint32_t speed = 0;

  855. 	if (spi_lobo_device_select(handle, 0) == ESP_OK) {

  856. 		if (host->hw->clock.clk_equ_sysclk == 1) speed = 80000000;

  857. 		else speed =  80000000/(host->hw->clock.clkdiv_pre+1)/(host->hw->clock.clkcnt_n+1);

  858. 	}

  859. 	spi_lobo_device_deselect(handle);

  860. 	return speed;

  861. }

  862. 

  863. //--------------------------------------------------------------------------

  864. uint32_t spi_lobo_set_speed(spi_lobo_device_handle_t handle, uint32_t speed)

  865. {

  866. 	spi_lobo_host_t *host=(spi_lobo_host_t*)handle->host;

  867. 	uint32_t newspeed = 0;

  868. 	if (spi_lobo_device_select(handle, 0) == ESP_OK) {

  869. 		spi_lobo_device_deselect(handle);

  870. 		handle->cfg.clock_speed_hz = speed;

  871. 		if (spi_lobo_device_select(handle, 1) == ESP_OK) {

  872. 			if (host->hw->clock.clk_equ_sysclk == 1) newspeed = 80000000;

  873. 			else newspeed =  80000000/(host->hw->clock.clkdiv_pre+1)/(host->hw->clock.clkcnt_n+1);

  874. 		}

  875. 	}

  876. 	spi_lobo_device_deselect(handle);

  877. 	

  878. 	return newspeed;

  879. }

  880. 

  881. //-------------------------------------------------------------

  882. bool spi_lobo_uses_native_pins(spi_lobo_device_handle_t handle)

  883. {

  884. 	return handle->host->no_gpio_matrix;

  885. }

  886. 

  887. //-------------------------------------------------------------------

  888. void spi_lobo_get_native_pins(int host, int *sdi, int *sdo, int *sck)

  889. {

  890. 	*sdo = io_signal[host].spid_native;

  891. 	*sdi = io_signal[host].spiq_native;

  892. 	*sck = io_signal[host].spiclk_native;

  893. }

  894. 

  895. /*

  896. When using  'spi_lobo_transfer_data' function we can have several scenarios:

  897. 

  898. A: Send only      (trans->rxlength = 0)

  899. B: Receive only   (trans->txlength = 0)

  900. C: Send & receive (trans->txlength > 0 & trans->rxlength > 0)

  901. D: No operation   (trans->txlength = 0 & trans->rxlength = 0)

  902. 

  903. */

  904. //----------------------------------------------------------------------------------------------------------

  905. esp_err_t IRAM_ATTR spi_lobo_transfer_data(spi_lobo_device_handle_t handle, spi_lobo_transaction_t *trans) {

  906. 	if (!handle) return ESP_ERR_INVALID_ARG;

  907. 

  908. 	// *** For now we can only handle 8-bit bytes transmission

  909. 	if (((trans->length % 8) != 0) || ((trans->rxlength % 8) != 0)) return ESP_ERR_INVALID_ARG;

  910. 

  911. 	spi_lobo_host_t *host=(spi_lobo_host_t*)handle->host;

  912. 	esp_err_t ret;

  913. 	uint8_t do_deselect = 0;

  914.     const uint8_t *txbuffer = NULL;

  915. 	uint8_t *rxbuffer = NULL;

  916. 

  917. 	if (trans->flags & LB_SPI_TRANS_USE_TXDATA) {

  918.         // Send data from 'trans->tx_data'

  919. 		txbuffer=(uint8_t*)&trans->tx_data[0];

  920. 	} else {

  921.         // Send data from 'trans->tx_buffer'

  922. 		txbuffer=(uint8_t*)trans->tx_buffer;

  923. 	}

  924. 	if (trans->flags & LB_SPI_TRANS_USE_RXDATA) {

  925.         // Receive data to 'trans->rx_data'

  926. 		rxbuffer=(uint8_t*)&trans->rx_data[0];

  927. 	} else {

  928.         // Receive data to 'trans->rx_buffer'

  929. 		rxbuffer=(uint8_t*)trans->rx_buffer;

  930. 	}

  931. 

  932. 	// ** Set transmit & receive length in bytes

  933. 	uint32_t txlen = trans->length / 8;

  934. 	uint32_t rxlen = trans->rxlength / 8;

  935. 

  936. 	if (txbuffer == NULL) txlen = 0;

  937. 	if (rxbuffer == NULL) rxlen = 0;

  938. 	if ((rxlen == 0) && (txlen == 0)) {

  939.         // ** NOTHING TO SEND or RECEIVE, return

  940.         return ESP_ERR_INVALID_ARG;

  941.     }

  942. 

  943.     // If using 'trans->tx_data' and/or 'trans->rx_data', maximum 4 bytes can be sent/received

  944. 	if ((txbuffer == &trans->tx_data[0]) && (txlen > 4)) return ESP_ERR_INVALID_ARG;

  945. 	if ((rxbuffer == &trans->rx_data[0]) && (rxlen > 4)) return ESP_ERR_INVALID_ARG;

  946. 

  947. 	// --- Wait for SPI bus ready ---

  948. 	while (host->hw->cmd.usr);

  949. 

  950.     // ** If the device was not selected, select it

  951. 	if (handle->cfg.selected == 0) {

  952. 		ret = spi_lobo_device_select(handle, 0);

  953. 		if (ret) return ret;

  954. 		do_deselect = 1;     // We will deselect the device after the operation !

  955. 	}

  956. 

  957. 	// ** Call pre-transmission callback, if any

  958. 	if (handle->cfg.pre_cb) handle->cfg.pre_cb(trans);

  959. 

  960.     // Test if operating in full duplex mode

  961. 	uint8_t duplex = 1;

  962. 	if (handle->cfg.flags & LB_SPI_DEVICE_HALFDUPLEX) duplex = 0; // Half duplex mode !

  963. 

  964.     uint32_t bits, rdbits;

  965. 	uint32_t wd;

  966. 	uint8_t bc, rdidx;

  967. 	uint32_t rdcount = rxlen;	// Total number of bytes to read

  968. 	uint32_t count = 0;			// number of bytes transmitted

  969. 	uint32_t rd_read = 0;		// Number of bytes read so far

  970. 

  971. 	host->hw->user.usr_mosi_highpart = 0; // use the whole spi buffer

  972. 

  973.     // ** Check if address phase will be used

  974. 	host->hw->user2.usr_command_value=trans->command;

  975. 	if (handle->cfg.address_bits>32) {

  976. 		host->hw->addr=trans->address >> 32;

  977. 		host->hw->slv_wr_status=trans->address & 0xffffffff;

  978. 	} else {

  979. 		host->hw->addr=trans->address & 0xffffffff;

  980. 	}

  981. 

  982. 	// Check if we have to transmit some data

  983. 	if (txlen > 0) {

  984. 		host->hw->user.usr_mosi = 1;

  985. 		uint8_t idx;

  986. 		bits = 0;				// remaining bits to send

  987. 		idx = 0;				// index to spi hw data_buf (16 32-bit words, 64 bytes, 512 bits)

  988. 

  989.         // ** Transmit 'txlen' bytes

  990. 		while (count < txlen) {

  991. 			wd = 0;

  992. 			for (bc=0;bc<32;bc+=8) {

  993. 				wd |= (uint32_t)txbuffer[count] << bc;

  994. 				count++;                    // Increment sent data count

  995. 				bits += 8;                  // Increment bits count

  996. 				if (count == txlen) break;  // If all transmit data pushed to hw spi buffer break from the loop

  997. 			}

  998. 			host->hw->data_buf[idx] = wd;

  999. 			idx++;

  1000. 			if (idx == 16) {

  1001. 				// hw SPI buffer full (all 64 bytes filled, START THE TRANSSACTION

  1002. 				host->hw->mosi_dlen.usr_mosi_dbitlen=bits-1;            // Set mosi dbitlen

  1003. 

  1004. 				if ((duplex) && (rdcount > 0)) {

  1005.                     // In full duplex mode we are receiving while sending !

  1006. 					host->hw->miso_dlen.usr_miso_dbitlen = bits-1;      // Set miso dbitlen

  1007. 					host->hw->user.usr_miso = 1;

  1008. 				}

  1009. 				else {

  1010. 					host->hw->miso_dlen.usr_miso_dbitlen = 0;           // In half duplex mode nothing will be received

  1011. 					host->hw->user.usr_miso = 0;

  1012. 				}

  1013. 

  1014. 				// ** Start the transaction ***

  1015. 				host->hw->cmd.usr=1;

  1016.                 // Wait the transaction to finish

  1017. 				while (host->hw->cmd.usr);

  1018. 

  1019. 				if ((duplex) && (rdcount > 0)) {

  1020. 					// *** in full duplex mode transfer received data to input buffer ***

  1021. 					rdidx = 0;

  1022. 			    	while (bits > 0) {

  1023. 						wd = host->hw->data_buf[rdidx];

  1024. 						rdidx++;

  1025. 						for (bc=0;bc<32;bc+=8) { // get max 4 bytes

  1026. 							rxbuffer[rd_read++] = (uint8_t)((wd >> bc) & 0xFF);

  1027. 							rdcount--;

  1028. 							bits -= 8;

  1029. 							if (rdcount == 0) {

  1030. 								bits = 0;

  1031. 								break; // Finished reading data

  1032. 							}

  1033. 						}

  1034. 			    	}

  1035. 				}

  1036. 				bits = 0;   // nothing in hw spi buffer yet

  1037. 				idx = 0;    // start from the beginning of the hw spi buffer

  1038. 			}

  1039. 		}

  1040. 		// *** All transmit data are sent or pushed to hw spi buffer

  1041. 		// bits > 0  IF THERE ARE SOME DATA STILL WAITING IN THE HW SPI TRANSMIT BUFFER

  1042. 		if (bits > 0) {

  1043. 			// ** WE HAVE SOME DATA IN THE HW SPI TRANSMIT BUFFER

  1044. 			host->hw->mosi_dlen.usr_mosi_dbitlen = bits-1;          // Set mosi dbitlen

  1045. 

  1046. 			if ((duplex) && (rdcount > 0)) {

  1047.                 // In full duplex mode we are receiving while sending !

  1048. 				host->hw->miso_dlen.usr_miso_dbitlen = bits-1;      // Set miso dbitlen

  1049. 				host->hw->user.usr_miso = 1;

  1050. 			}

  1051. 			else {

  1052. 				host->hw->miso_dlen.usr_miso_dbitlen = 0;           // In half duplex mode nothing will be received

  1053. 				host->hw->user.usr_miso = 0;

  1054. 			}

  1055. 

  1056. 			// ** Start the transaction ***

  1057. 			host->hw->cmd.usr=1;

  1058.             // Wait the transaction to finish

  1059. 			while (host->hw->cmd.usr);

  1060. 

  1061. 			if ((duplex) && (rdcount > 0)) {

  1062.                 // *** in full duplex mode transfer received data to input buffer ***

  1063. 				rdidx = 0;

  1064. 		    	while (bits > 0) {

  1065. 					wd = host->hw->data_buf[rdidx];

  1066. 					rdidx++;

  1067. 					for (bc=0;bc<32;bc+=8) { // get max 4 bytes

  1068. 						rxbuffer[rd_read++] = (uint8_t)((wd >> bc) & 0xFF);

  1069. 						rdcount--;

  1070. 						bits -= 8;

  1071. 						if (bits == 0) break;

  1072. 						if (rdcount == 0) {

  1073. 							bits = 0;

  1074. 							break; // Finished reading data

  1075. 						}

  1076. 					}

  1077. 		    	}

  1078. 			}

  1079. 		}

  1080. 		//if (duplex) rdcount = 0;  // In duplex mode receive only as many bytes as was transmitted

  1081. 	}

  1082. 

  1083. 	// ------------------------------------------------------------------------

  1084. 	// *** If rdcount = 0 we have nothing to receive and we exit the function

  1085.     //     This is true if no data receive was requested,

  1086.     //     or all the data was received in Full duplex mode during the transmission

  1087. 	// ------------------------------------------------------------------------

  1088. 	if (rdcount > 0) {

  1089. 		// ----------------------------------------------------------------------------------------------------------------

  1090. 		// *** rdcount > 0, we have to receive some data

  1091. 		//     This is true if we operate in Half duplex mode when receiving after transmission is done,

  1092. 		//     or not all data was received in Full duplex mode during the transmission (trans->rxlength > trans->txlength)

  1093. 		// ----------------------------------------------------------------------------------------------------------------

  1094. 		host->hw->user.usr_mosi = 0;  // do not send

  1095. 		host->hw->user.usr_miso = 1;  // do receive

  1096. 		while (rdcount > 0) {

  1097. 			if (rdcount <= 64) rdbits = rdcount * 8;

  1098. 			else rdbits = 64 * 8;

  1099. 

  1100. 			// Load receive buffer

  1101. 			host->hw->mosi_dlen.usr_mosi_dbitlen=0;

  1102. 			host->hw->miso_dlen.usr_miso_dbitlen=rdbits-1;

  1103. 

  1104. 			// ** Start the transaction ***

  1105. 			host->hw->cmd.usr=1;

  1106. 			// Wait the transaction to finish

  1107. 			while (host->hw->cmd.usr);

  1108. 

  1109. 			// *** transfer received data to input buffer ***

  1110. 			rdidx = 0;

  1111. 			while (rdbits > 0) {

  1112. 				wd = host->hw->data_buf[rdidx];

  1113. 				rdidx++;

  1114. 				for (bc=0;bc<32;bc+=8) {

  1115. 					rxbuffer[rd_read++] = (uint8_t)((wd >> bc) & 0xFF);

  1116. 					rdcount--;

  1117. 					rdbits -= 8;

  1118. 					if (rdcount == 0) {

  1119. 						rdbits = 0;

  1120. 						break;

  1121. 					}

  1122. 				}

  1123. 			}

  1124. 		}

  1125. 	}

  1126. 

  1127. 	// ** Call post-transmission callback, if any

  1128. 	if (handle->cfg.post_cb) handle->cfg.post_cb(trans);

  1129. 

  1130. 	if (do_deselect) {

  1131.         // Spi device was selected in this function, we have to deselect it now

  1132. 		ret = spi_lobo_device_deselect(handle);

  1133. 		if (ret) return ret;

  1134. 	}

  1135. 

  1136. 	return ESP_OK;

  1137. }